The present invention relates to opto-electronic substrates that may be used to connect digital and/or analog electronic systems, and methods for making such systems. More specifically, the present invention relates to opto-electronic substrates that have both electrical and optical interconnections, and methods for making such substrates. The present invention may be applied to multichip modules (MCMs) and the like.
With the increase in clock rates and I/O counts of processing systems implemented on interconnection substrates, the problems of interconnection bottlenecks, noise, signal attenuation, heat generation, and maintaining synchronizable connection lengths in the electrical connections of such systems are appearing. An optical interconnect has the advantage of low RC delay, low signal attenuation, predictable delay, low power, low noise and high tolerance to opens and shorts. However, there is a large barrier which prevents optical interconnections from being used in high-speed digital/analog systems. Thus far, bulky driver chips and amplifier chips have been required to provide the conversions between the optical signals in the optical interconnects and the electrical signals which are generated and used by the electronic chips. Each electrical signal that is to be conveyed optically over a long distance requires a light emitting device, a driver chip to generate the electrical power for switching the light-emitting device at one end of the optical connection. At the receiving end of the optical connection, a photo-detector device and an amplifier is required to convert the optical signal to electrical form. The amplifier is needed because the light power becomes small at the photo-detector device due to considerable loss in conventional optical paths. The driver and amplifier components require space on the circuit substrate, and therefore represent barriers to using large numbers of optical connections in a substrate, like a multichip module. In fact, the area needs of these components, as well as the area needs for the emitter devices and photo-detector devices, would increase the size of the module substrates to be larger than module substrates with pure electrical connections. These excess components and their assembling increase manufacturing costs. Furthermore, the conventional optical connections have longer delay due to EO and OE conversions, which would not provide significant speed benefits over pure electrical modules.
The present application is directed to providing optical connection configurations and methods for manufacturing the optical connections such that the above problems may be overcome.
One aspect of the present application eliminates the need for the bulky drivers and amplifiers, which significantly reduces area requirements. In the place of a light-emitting source, the combination of an external light-source and an optical switch device (e.g., modulator) is used. The optical switch device is responsive to an output of an IC chip, and does not require a driver chip for operation. In contrast to light emitting source cases, the power of optical signals in implementations using light modulators can be greatly increased by increasing the size and power of the external light source. The external light source can be easily increased in this manner since it does not need to be modulated. For example, it can be implemented as a simple continuous wave (CW) or pulse trains source of optical power. In addition, losses in the optical connection are reduced. Therefore, the power at the photo-detectors is increased, which enables the amplifiers to be eliminated. The losses are reduced by integrally forming polymeric waveguides with the optical switches and the photo-detectors, which increases optical coupling efficiency. Additionally, the construction methods of the present invention enable short optical connections to be made. Optical power to the photo-detector device is increased by using the external optical power. In addition, optical waveguide integration methods of the present invention enable highly efficient optical connections to be made to VGSEL and laser-diode (LD) emitter devices, which enables these devices to be used as sources of optical power in addition to external sources.
Another aspect of the present application realizes device and/or material integration into an xe2x80x9copto-electronic (OE) layerxe2x80x9d, which increases room for chip-mounting, and reduces the total system cost by eliminating the difficulty of optical alignment between OE devices and optical waveguides. OE devices can be embedded into waveguide layers by using wafer processing techniques according to the present invention. Methods according to the present invention enable opto-electronic devices (e.g., modulators, VCSELs, photo-detectors, optical switches, laser-diode(LD), driver chips, amplifier chips, etc.) to be integrated with optical waveguides in ultra thin polymer layers on the order of 1 xcexcm to 250 xcexcm.
Another aspect of the present application provides OE substrates by stacking the above-described OE layers on top of one another and by joining them together, such as by lamination or by a build-up fabrication process. The OE layers can then be overlaid upon the surface of a conventional electrical substrate without requiring extra room for the photo-detectors, optical-switches, light-emitting components, driver chips, amplifier chips, etc. in fact, multiple OE layers can be stacked upon one another to provide all the required photo-detectors, optical-switches, light-emitting devices, driver chips, amplifier chips, etc. The present application provides several construction methods for forming these OE layers, and also provides several substrate configurations.
Another aspect of the present application is a method to stack two or more OE films, permitting an increase in the functionality of the stacked structure compared to a single OE film. Each OE film may comprise a single-layer structure or be build-up-of multiple-layer structures, including electrical layers by a Z-connection method. The OE layers and electrical layers on each OE film may be optimized separately. Preferred embodiments of stacked OE films include flexible interconnections, OE Interposers, film OE-MCM, both-side packaging, back-side connection, and a Film Optical Link Module (FOLM). Additionally, stacked films permit the use of a greater variety of fabrication processes compared to a single film. In particular, a stacked film enables both-side processing by permitting processed layers to be inverted upside-down.
On embodiment of the invention provides a method of constructing an electronic circuit assembly comprising the steps of:
a) forming at least one electrode on a substrate;
b) forming a layer of undercladding material upon the substrate and over the electrode;
c) forming a wave guide core layer on the layer of cladding material;
d) patterning the wave guide layer to produce at least one optical wave guide and exposed undercladding material;
e) forming a layer of overcladding material upon the exposed undercladding material and over the optical wave guide;
f) forming at least one via aperture through the overcladding material and the undercladding material; and
g) disposing a conductive material in the via aperture to produce an electronic circuit assembly.
In the immediate foregoing method, the disposing step (g) additionally comprises disposing a partial layer of the conductive material over the overcladding material. Preferably, a patterned resist is preferably formed on the overcladding material prior to the disposing step (g). The via aperture may terminate in the electrode. The forming step (f) additionally comprises removing a portion of the optical wave guide The forming step (f) further additionally comprises forming the via aperture to have opposed via walls such that a portion of the optical wave guide is generally centrically disposed in the via aperture between the via walls. Disposing step (g) may additionally comprise disposing conductive material on the opposed via walls and against the portion of the optical wave guide.
Another embodiment of the invention provides a method of constructing an electronic circuit assembly comprising the steps of:
a) forming at least one electrode on a substrate;
b) disposing an electro-optic device on the substrate;
c) forming a layer of undercladding material upon the substrate and over the electrode and the electro-optic device;
d) disposing a second electrode on the layer of undercladding material;
e) disposing an intermediate layer of cladding material over exposed portions of the layer of undercladding material and over the second electrode;
f) forming a wave guide core layer on the layer of cladding material;
g) patterning the wave guide layer to produce at least one optical wave guide and exposed undercladding material;
h) forming a layer of overcladding material upon the exposed undercladding material and over the optical wave guide;
i) forming at least one via aperture through the overcladding material and the undercladding material; and
j) disposing a conductive material in the via aperture to produce an electronic circuit assembly.
The immediate foregoing method may additionally comprise polishing the layer of the cladding material prior to disposing step (d) until a top of the electrode is aligned with the cladding material; and forming, prior to disposing step (d), an opening in the layer of undercladding material to expose a portion of the electro-optic device; and disposing conductive material in the opening and in contact with the electro-optic device. The disposing step (j) may additionally comprise disposing a partial layer of the conductive material over the overcladding material. A patterned resist may be formed on the overcladding material prior to the disposing step (j). The forming step (i) may additionally comprise removing a portion of the optical wave guide and/or forming a forty-five degree sidewall in the optical wave guide for receiving an optical reflective surface. The forming step (i) may also additionally comprise forming the via aperture to have opposed via walls such that a portion of the optical wave guide is generally centrically disposed in the via aperture between the via walls. Disposing step (j) may additionally comprise disposing conductive material on the opposed via walls and against the portion of the optical wave guide.
Embodiments of the present invention also provide a method of constructing an electronic circuit assembly comprising the steps of:
a) forming a layer of undercladding material upon a first substrate;
b) forming a wave guide core layer on the layer of cladding material;
c) patterning the wave guide layer to produce at least one optical wave guide and exposed undercladding material;
d) forming a layer of overcladding material upon the exposed undercladding material;
e) forming at least one via aperture through the overcladding material and the undercladding material;
f) disposing a conductive material in the via aperture leaving a first portion of the conductive material exposed; and
g) coupling the first portion of the conductive material to a second substrate to produce an electronic circuit.
The immediate foregoing method additionally comprises removing the first substrate to expose a second portion of the conductive material, and disposing at least one electrode on the exposed second portion of the conductive material, and coupling the disposed electrode to another electronic circuit assembly. The second substrate may be removed to expose the first portion of the conductive material.
Further embodiments of the present invention provide a method of constructing an electronic circuit assembly comprising the steps of:
a) forming a layer of undercladding material upon a first substrate;
b) forming a wave guide core layer on the layer of cladding material;
c) patterning the wave guide layer to produce at least one optical wave guide and exposed undercladding material;
d) forming a layer of overcladding material upon the exposed undercladding material and over the optical wave guide;
e) disposing an electrode on the layer of overcladding material;
f) disposing an electro-optic device on the layer of overcladding material;
g) depositing an intermediate layer of cladding material over exposed overcladding material and over the electrode and the electro-optic device;
h) removing a portion of the intermediate layer of cladding material and a portion of a top of the electrode until a plane along the top of the electro-optic device registers with a residual electrode surface and a residual cladding surface respectively remaining after removal of the portion of the top of the electrode and the portion of the intermediate layer of cladding material;
i) disposing a second electrode on the residual electrode surface;
j) coupling the second electrode to a second substrate;
k) removing the first substrate to expose the undercladding material;
l) forming at least one via aperture through the overcladding material and the undercladding material; and
m) disposing a conductive material in the via aperture to produce an electronic circuit assembly.
Another aspect of the present application is to provide three-dimensional opto-electrical modules, and methods for making, which provide for Z-direction waveguides formed perpendicular to the plane of a stack of OE, waveguide, and chip layers, and which interconnections between the Z-direction waveguides and waveguides in the stack of layers.
These features provide the advantageous effect of enabling large-scale optical interconnections to be added to electrical substrates without increasing area requires of the substrate. These features also enable the optical coupling efficiencies of optical interconnections to be increased. These features are also applicable to optical-parallel-link modules.
In the present application, examples of multichip modules are principally shown. However, the same features and aspects of the present invention are applicable to electrical backplanes, printed-circuit boards (PCBs), chip size packages (CSPs), and other substrates.